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IDProjectCategoryView StatusLast Update
0000748T99X171.00 SKB EagleHWpublic2021-12-23 17:23
Reporter(ALTech) SH Son Assigned To(HW) Sean Chiang Due Date2019-07-19 16:10
PriorityhighSeveritys2-severeReproducibilitysometimes
Status closedResolutionopen 
Summary0000748: [BFX-AT100] ethernet CRC Fail at 1K production
DescriptionHi Sheila

as last production result, we found 4 pcs of ethernet CRC fail DUT.
 
 Function test : 1000 / 1004pcs
 Ethernet CRC fail : 4pcs

So, could you please assign right person for review the this issue. and update the analysis of this issue.

thanks
SON

Additional Informationplease refer to the below Mantis.
I think, It's kine of same issue.

https://mantis.cnsbg.foxconn.com/vaas/view.php?id=560
Tagscrc
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Users monitoring this issue

User List (ALTech) BY Lee , (ALTech) JW Kim , (ALTech) Philip , (ALTech) SB Park , (ALTech) SH Son , (ALTech) SY Yoon

Activities

(PM) Sheila Tu

2019-07-03 15:46

developer   ~0002823

Hi Sean, please help to update CRC issue to SH. Thank you.

(HW) Sean Chiang

2019-07-05 21:36

developer   ~0002830

Hi SH,
For the 4pcs CRC fail SoC, our MFG side have done SoC swap experiment and confirmed that the CRC error defect is follows with SoC.
Attached is the failure analysis report provided by our VN QA.
However, we have discussed this issue with AML Shawn who is FAE lead in Taiwan, and he mentioned that this issue is due to the RX timing widow doesn’t at center points in current default RGMII parameter on SKB board.
The CRC issue is gone after changing the parameters to the center value. So those chips are not the fail chips and cannot go RMA process. The correct actions are we need collect more data on SKB boards to know which parameter are suitable on SKB boards.
We will arrange 30-50pcs DVT boards in Taiwan (under checking internally) and do the RGMII RX window measurement at early of next week.
Will let you know our result once we finished the measurement.

(ALTech) SH Son

2019-07-16 09:26

developer   ~0002833

@ Sean Chiang
Could you please update as you mentioned 30-50pcs DVT boards in Taiwan test result.

And let us know, what is the temporary action in factory to meet the ship out q'ty when next PO (9K + 41K??)

Thanks
SON

Issue History

Date Modified Username Field Change
2019-07-03 15:17 (ALTech) SH Son New Issue
2019-07-03 15:17 (ALTech) SH Son Status new => assigned
2019-07-03 15:17 (ALTech) SH Son Assigned To => (PM) Sheila Tu
2019-07-03 15:17 (ALTech) SH Son Issue Monitored: (ALTech) BY Lee
2019-07-03 15:17 (ALTech) SH Son Issue Monitored: (ALTech) JW Kim
2019-07-03 15:17 (ALTech) SH Son Issue Monitored: (ALTech) Philip
2019-07-03 15:17 (ALTech) SH Son Issue Monitored: (ALTech) SB Park
2019-07-03 15:17 (ALTech) SH Son Issue Monitored: (ALTech) SH Son
2019-07-03 15:17 (ALTech) SH Son Issue Monitored: (ALTech) SY Yoon
2019-07-03 15:46 (PM) Sheila Tu Assigned To (PM) Sheila Tu => (HW) Sean Chiang
2019-07-03 15:46 (PM) Sheila Tu Note Added: 0002823
2019-07-05 21:36 (HW) Sean Chiang File Added: U1 Failure Analysis report (7.3).pdf
2019-07-05 21:36 (HW) Sean Chiang Note Added: 0002830
2019-07-16 09:26 (ALTech) SH Son Note Added: 0002833
2019-08-05 17:30 (ALTech) SH Son Tag Attached: crc
2021-12-23 17:23 (SW) Jacky Chiang Status assigned => closed